School of Engineering

Our Clean Room

Welcome

Our Clean Room

Courses

Outreach & Collaboration

Ethics & Societal Impact

References & Publications

Contact Us

 

The Solid State Electronics Fabrication lab consists of a class 10,000 clean room with approximately 1,000 square feet of work area. The temperature and humidity of the lab are tightly controlled to be 70° ±5° and 42.5% ±3%, respectively. The lab is capable of processes including silicon-based optoelectronics and 3 µm metal-gate NMOS and supports both undergraduate research and education in the areas of solid state devices, integrated circuits, and MEMs/NEMs.

  • Two Mask Aligners
  • Spin-Coating System
  • Diffusion Doping Furnace
  • Wet and Dry Oxidation Furnace
  • Thermal Annealing Furnace
  • Thermal Evaporation System
  • Wet Chemistry Benches
  • Atomic Force Microscope (AFM)
  • Scanning Electron Microscope (SEM)
  • Optical Microscopes
  • Four Point Probes
  • Semiconductor Parameter Analyzers
  • Ellipsometer

Photos

Clean Room Clean Room
Clean Room Clean Room
Clean Room GVSU

 

 

 

 

NSF Logo

This work has been supported by an National Science Foundation (NSF) grant number
NUE 09-533 for the period of Jan 2010 - Dec 2012.

 

Page last modified February 23, 2012